Regviz

Espressif Systems /ESP32-P4 /MIPI_CSI_BRIDGE /INT_RAW

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as INT_RAW

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Espressif Systems/ESP32-P4/MIPI_CSI_BRIDGE/INT_RAW#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (VADR_NUM_GT_INT_RAW)VADR_NUM_GT_INT_RAW 0 (VADR_NUM_LT_INT_RAW)VADR_NUM_LT_INT_RAW 0 (DISCARD_INT_RAW)DISCARD_INT_RAW 0 (CSI_BUF_OVERRUN_INT_RAW)CSI_BUF_OVERRUN_INT_RAW 0 (CSI_ASYNC_FIFO_OVF_INT_RAW)CSI_ASYNC_FIFO_OVF_INT_RAW 0 (DMA_CFG_HAS_UPDATED_INT_RAW)DMA_CFG_HAS_UPDATED_INT_RAW

Description

csi bridge interrupt raw.

Fields

VADR_NUM_GT_INT_RAW

reg_vadr_num is greater than real interrupt raw.
VADR_NUM_LT_INT_RAW

reg_vadr_num is less than real interrupt raw.
DISCARD_INT_RAW

an incomplete frame of data was sent interrupt raw.
CSI_BUF_OVERRUN_INT_RAW

buffer overrun interrupt raw.
CSI_ASYNC_FIFO_OVF_INT_RAW

buffer overflow interrupt raw.
DMA_CFG_HAS_UPDATED_INT_RAW

dma configuration update complete interrupt raw.

Links

()

Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

 ()

Register Reference

https://github.com/espressif/svd